1. Field of the Invention
The present invention relates to an etching method for use in the manufacture of a semiconductor device and the like and an etch mask for use in the etching method.
2. Description of the Background Art
FIG. 12 is a cross-sectional view of a DRAM including a capacitor having a dielectric film made of a material having a high dielectric constant such as BST (barium strontium titanate). The DRAM comprises MISFETs 18 formed on a semiconductor substrate 13, and capacitors 19. Isolation regions 14 and active regions 15 are formed in the semiconductor substrate 13. MIS gates 16, contact plugs 4, a bit line 17 and a interlayer insulation film 5 are formed on the surface of the semiconductor substrate 13. Each of the MISFETs 18 comprises one MIS gate 16 and two active regions 15 on opposite sides of part of the semiconductor substrate 13 which lies immediately under the MIS gate 16.
Each of the capacitors 19 comprises an upper electrode 10, a dielectric layer 9 made of the high dielectric constant material, and a lower electrode 2 connected to its associated active region 15 through a barrier metal layer 3 and a contact plug 4. The barrier metal layer 3 is formed between the contact plug 4 and the lower electrode 2 for the purpose of preventing adverse effects of contact of the contact plug 4 with the lower electrode 2 upon the lower electrode 2 (e.g., such an effect that when the contact plug 4 is made of polysilicon and the lower electrode 2 is made of metal, the metal in contact with the polysilicon is silicided to increase the resistance value thereof). The barrier metal layer 3 is made of, for example, TiN or TaN. A lower electrode sidewall 8 is formed to prevent the barrier metal layer 3 from contacting the dielectric layer 9.
In FIG. 12, two capacitors 19 are shown as formed in corresponding relationship with two MISFETs 18, and two lower electrodes 2, two barrier metal layers 3 and two lower electrode sidewalls 8 are shown as formed in side-by-side relation on opposite sides of the bit line 17. The dielectric layer 9 and the upper electrode 10 are common to the two capacitors 19.
An interlayer insulation film 11 is formed on an upper surface of the upper electrode 10, and an interconnect layer 12 is formed on an upper surface of the interlayer insulation film 11, as illustrated in FIG. 12.
The electrodes of the capacitor including the dielectric layer made of the high dielectric constant material are made of, e.g., metal such as Pt (platinum). The electrodes made of such metal may be formed by, e.g., dry etching. However, since the metal such as Pt is inactive to chemical reactions at near room temperature, etching resulting from a chemical reaction does not vigorously occur under etching conditions at near room temperature, but an etching process proceeds almost by the action of physical etching (which etching process is referred to hereinafter as sputter etching).
The procedure of the process of performing sputter etching on the metal such as Pt will be described with reference to FIGS. 13 through 19, taking the process of forming the capacitor 19 shown in FIG. 12 as an example. First, the semiconductor substrate 13 with the interlayer insulation film 5 and the contact plug 4 formed thereon is prepared.
The barrier metal layer material 3 and the lower electrode material 2 (metal such as Pt) stacked in the order named are formed on the surfaces of the interlayer insulation film 5 and the contact plug 4. A photoresist 6 is formed on the surface of the lower electrode material 2 and patterned using a photolithographic technique (FIG. 13). Part of the lower electrode material 2 which is not covered with the photoresist 6 is removed by the sputter etching (FIG. 14).
During the sputter etching, sputtering causes the redeposition of the lower electrode material 2, and the redeposits are prone to adhere to the photoresist 6. A redeposit adhering to the upper surface of the photoresist 6 is soon removed by the sputter etching, but a deposit 7 contiguous with the lower electrode 2 is formed on the side surface of the photoresist 6 as shown in FIG. 14.
Thereafter, part of the barrier metal layer material 3 which is not covered with the photoresist 6 and the lower electrode 2 is removed (FIG. 15). The remaining photoresist 6 is then removed (FIG. 16). The deposit 7 which would hinder the lower electrode 2 from functioning as a capacitor electrode is removed by scrubber treatment (FIG. 17).
The material of the lower electrode sidewall 8 is formed to cover the lower electrode 2, the barrier metal layer 3 and the interlayer insulation film 5 (FIG. 18), and is etched back by the sputter etching (FIG. 19). Thereafter, the dielectric layer 9 and the upper electrode 10 are formed. This completes the capacitor 19.
However, there has been a likelihood that the reliability of the capacitor decreases to reduce yields in spite of the removal of the deposit 7 for reasons to be described below. In some cases, the deposit 7 is not completely removed by the scrubber treatment, and a residue of the deposit 7 establishes a short circuit, for example, between the upper electrode 10 and the lower electrode 2. In other cases, traces 7a of the deposit 7 remain after the scrubber treatment of the deposit 7 as shown in FIGS. 17 through 19 to cause electric field concentration during the operation of the capacitor because of their protruding shape, which might induce a leakage current.
To suppress the development of such a deposit 7, the photoresist 6 should be made as thin as possible for reduction in side surface area thereof. The reduction in side surface area decreases the amount of the redeposit adhering to the photoresist 6. Further, since the redeposit is less prone to adhere to a top part of the side surface of the photoresist 6 under the influence of the sputter etching performed from above, it can be contemplated that the reduction in the thickness of the photoresist 6 results in the deposit less prone to develop on the side surface of the photoresist 6.
However, there is a likelihood that the photoresist 6 of the reduced thickness does not function as an etch mask when the lower electrode material 2 is sputter etched. The photoresist is not high in physical strength and is gradually removed as the sputter etching proceeds as shown in FIGS. 14 and 15. Thus, the photoresist 6 of the reduced thickness might be completely removed. It is hence difficult to reduce the thickness of the photoresist 6.
To solve the above problem, it is contemplated to use a physically strong material, rather than the photoresist, as the etch mask (which etch mask is referred to hereinafter as a hard mask). The procedure of the etching process using the hard mask will be described with reference to FIGS. 20 through 24, taking the process of forming the capacitor 19 of FIG. 12 as an example.
First, the semiconductor substrate 13 with the interlayer insulation film 5 and the contact plug 4 formed thereon is prepared. The barrier metal layer material 3, the lower electrode material 2 and a hard mask material 1 stacked in the order named are formed on the surfaces of the interlayer insulation film 5 and the contact plug 4. The photoresist 6 is formed on the surface of the hard mask material 1 and patterned using a photolithographic technique (FIG. 20). Part of the hard mask material 1 which is not covered with the photoresist 6 is removed by dry etching or the like. The photoresist 6 is also removed (FIG. 21).
Part of the lower electrode material 2 which is not covered with the hard mask material 1 is removed by the sputter etching (FIG. 22). Thereafter, part of the barrier metal layer material 3 which is not covered with the hard mask material 1 is removed (FIG. 23). The hard mask 1 is then removed (FIG. 24).
The lower electrode sidewall 8 is formed in a manner described with reference to FIGS. 18 and 19. Thereafter, the dielectric layer 9 and the upper electrode 10 are formed. This completes the capacitor.
When the hard mask is thus used which may be reduced in thickness, the redeposit of the lower electrode 2 is not prone to adhere to the side surface of the hard mask 1 during the sputter etching. This eliminates the need for the scrubber treatment to produce neither the short circuit resulting from the residue of the deposit nor the protruding traces of the deposit in the capacitor. Therefore, there is little likelihood that the reliability of the capacitor decreases to reduce yields. Examples of such a hard mask in current use are a SiO2 (silicon dioxide) film 1c as shown in FIG. 25 and a TiN (titanium nitride) film Id as shown in FIG. 26.
The use of etching (referred to hereinafter as reactive etching) involving not only the sputter etching but also etching resulting from a chemical reaction for the formation of the lower electrode 2 also suppresses the development of the above-mentioned mentioned deposit. The reactive etching which involves the etching resulting from a chemical reaction reduces the amount of redeposit of the lower electrode material 2 resulting from the sputtering. Accordingly, the redeposit is less prone to adhere to the side surface of the etch mask.
For this purpose, the etching is performed under the conditions of temperature at which the metal such as Pt is active to chemical reactions. That is, temperature must be raised during the etching. However, in the case of etching which uses the photoresist as the etch mask, the photoresist fails to function as the etch mask, e.g., at about 200xc2x0 C. in some cases. It is hence difficult to establish the high temperature etching conditions.
On the other hand, a heat resistant material may be selected for the hard mask. The above described SiO2 film and the TiN film are resistant to heat under the conditions of temperature at which the metal such as Pt is active to chemical reactions. Therefore, reactive etching may be performed using a process similar to that of the sputter etching shown in FIGS. 20 through 24. Thus, the reactive etching which involves the etching resulting from a chemical reaction for the formation of the lower electrode 2 makes the deposit even less prone to develop than does the sputter etching alone.
However, the SiO2 film and the TiN film used as the hard mask are not always suitable for the hard mask. The materials of these films present problems particularly when the electrode is made of metal such as Pt. More specifically, the SiO2 film has poor adherence to metal such as Pt and thus is prone to cause pattern removal. The TiN film has an insufficient etch selectivity to metal such as Pt. Increasing the thickness of the hard mask so as to compensate for the insufficiency of the etch selectivity results in the development of more deposit and the difficulty in patterning the hard mask itself
To solve both of the problems with the SiO2 film and the TiN film, it has been contemplated to use as the hard mask a multilayered SiO2/TiN film as shown in FIG. 27 which comprises the TiN film 1d and the SiO2 film 1c formed thereon.
Unfortunately, the use of the multilayered SiO2/TiN film requires the additional steps of forming and removing the same, resulting in a complicated process. Particularly in the step of forming the multilayered SiO2/TiN film, the TiN film is formed by a PVD (Physical Vapor Deposition) process whereas the SiO2 film is formed by a CVD (Chemical Vapor Deposition) process. This necessitates the removal of the semiconductor device out of PVD equipment and the transfer of the semiconductor device into CVD equipment.
According to a first aspect of the present invention, a method of etching comprises the steps of: (a) preparing a substrate; (b) forming a film to be etched on the substrate; (c) forming a first TiSiN film on a surface of the film to be etched; (d) patterning the first TiSiN film by a photolithographic technique; and (e) etching the film to be etched, using the patterned first TiSiN film as an etch mask.
Preferably, according to a second aspect of the present invention, the method of the first aspect further comprises the step of (f) isotropically etching the first TiSiN film, the step (f) being performed after the step (d) and before the step (e).
Preferably, according to a third aspect of the present invention, the method of the first aspect further comprises the step of (f) forming a TiSi film on a surface of the first TiSiN film, the step (f) being performed before the step (d), wherein the first TiSiN film and the TiSi film are patterned into the same configuration by a photolithographic technique in the step (d).
Preferably, according to a fourth aspect of the present invention, the method of the third aspect further comprises the step of (g) isotropically etching the first TiSiN film and the TiSi film, the step (g) being performed after the step (d) and before the step (e).
Preferably, according to a fifth aspect of the present invention, the method of any one of the first to fourth aspects further comprises the step of (h) forming a second TiSiN film on the substrate, the step (h) being performed before the step (b).
According to a sixth aspect of the present invention, an etch mask comprises: Ti; Si; and N.
According to a seventh aspect of the present invention, an etch mask comprises: a first layer made of TiSiN; and a second layer made of TiSi and formed on an upper surface of the first layer.
The etching method according to the first aspect of the present invention provides the first TiSiN film functioning as an etch mask having good adherence to and a high etch selectivity to the film to be etched when the film to be etched is made of metal. Further, the first TiSiN film differs from a conventional multilayered SiO2/TiN film in that it does not require the complicated steps of forming and removing the same.
The etching method according to the second aspect of the present invention can narrow the first TiSiN film serving as the etch mask to pattern the film to be etched into a smaller configuration.
The etching method according to the third aspect of the present invention provides the TiSi film functioning as an etch mask having a higher etch selectivity to the film to be etched when the film to be etched is made of metal, as well as producing the effects of the etching method of the first aspect.
The etching method according to the fourth aspect of the present invention can narrow the first TiSiN film and the TiSi film serving as the etch mask to pattern the film to be etched into a smaller configuration.
The etching method according to the fifth aspect of the present invention provides the second TiSiN film functioning as a barrier metal for the film to be etched. Additionally, the etching method according to the fifth aspect permits the process to proceed rapidly in the steps of forming and removing the first and second TiSiN films.
The etch mask according to the sixth aspect of the present invention has good adherence to and a high etch selectivity to a film to be etched when the film to be etched is made of metal.
The etch mask according to the seventh aspect of the present invention includes the first layer having good adherence to the film to be etched and the second layer having a higher etch selectivity to the film to be etched than the first layer when the film to be etched is made of metal.
It is therefore an object of the present invention to provide an etching method using a hard mask made of a material which has good adherence to and a high etch selectivity to an electrode material and which requires the uncomplicated steps of forming and removing the same.
These and other objects, features, aspects and advantages of the present invention will become more apparent from the following detailed description of the present invention when taken in conjunction with the accompanying drawings.